The present invention relates generally to magnetic memory devices and, more particularly, to a process sequence of fabricating magnetic random access memory (MRAM) devices.
Magnetic (or magneto-resistive) random access memory (MRAM) is a promising technology in the development of non-volatile random access memory that could begin to replace the existing dynamic random access memory (DRAM) as the standard memory for computing devices. The use of MRAM as a non-volatile RAM will eventually allow for “instant on” systems that come to life as soon as the system is turned on, thus saving the amount of time needed for a conventional PC, for example, to transfer boot data from a hard disk drive to volatile DRAM during system power up.
A magnetic memory element (also referred to as a tunneling magneto-resistive, or TMR device) includes a structure having ferromagnetic layers separated by a non-magnetic layer, and arranged into a magnetic tunnel junction (MTJ). Digital information is stored and represented in the memory element as directions of magnetization vectors in the magnetic layers. More specifically, magnetic vectors in one magnetic layer (also referred to as a reference layer) are magnetically fixed or pinned, while the magnetization direction of the other magnetic layer (also referred to as a “free” layer) may be switched between the same direction and the opposite direction with respect the fixed magnetization direction of the reference layer. The magnetization directions of the free layer are also known “parallel” and “antiparallel” states, wherein a parallel state refers to the same magnetic alignment of the free and reference layers, while an antiparallel state refers to opposing magnetic alignments therebetween.
Depending upon the magnetic state of the free layer (parallel or antiparallel), the magnetic memory element exhibits two different resistances in response to a vertically applied current with respect to the TMR device. The particular resistance of the TMR device thus reflects the magnetization state of the free layer, wherein resistance is “low” when the magnetization is parallel, and “high” when the magnetization is antiparallel. Accordingly, a detection of changes in resistance allows an MRAM device to provide information stored in the magnetic memory element (i.e., a read operation). In addition, an MRAM cell is written to through the application a bi-directional current in a particular direction, in order to magnetically align the free layer in a parallel or antiparallel state.
A practical MRAM device integrates a plurality of magnetic memory elements with other circuits such as, for example, control circuits for the magnetic memory elements, comparators for detecting the states in the magnetic memory elements, input/output circuits, etc. As such, there are certain microfabrication processing difficulties to be overcome before high capacity/density MRAM products become commercially available. For example, in order to reduce the power consumption of the device, CMOS switching technology is desirable. As is known in the art, various CMOS processing steps (such as depositing dielectric and metal layers and annealing implants) are carried out at relatively requires high temperatures (e.g., in excess of 300E C). On the other hand, magnetic layers employ ferromagnetic material, such as CoFe and NiFeCo, that requires processing temperatures below 300E C in order to prevent intermixing of magnetic materials. Thus, the magnetic memory elements need to be fabricated at a different stage after CMOS processing.
Moreover, magnetic memory elements contain components that are easily oxidized and also sensitive to corrosion. To protect magnetic memory elements from degradation and keep the performance and reliability of the MRAM device, a passivation layer is typically formed thereupon. In addition, a magnetic memory element includes very thin layers, some of them on the order tens of angstroms thick. Because the performance of the magnetic memory element is particularly sensitive to the surface conditions on which magnetic layers are deposited, it is desirable to maintain a relatively flat surface to prevent the characteristics of an MRAM device from degrading.
Notwithstanding the above described processing variations between ferromagnetic materials and conventional DRAM elements, it is desirable to be able to simplify the MRAM fabrication process and increase the compatibility thereof with conventional back-end-of-line (BEOL), e.g. copper, metallization techniques.